Embodiments presented herein generally relate to FPGA-based coherent accelerators, and more specifically, to resolving page faults out of context for shared contexts on computing systems with FPGA-based coherent accelerators.
Some FPGA-based hardware accelerators provide an application direct access to the hardware accelerator. For example, an FPGA-based coherent accelerator allows an application to execute SCSI commands in an application's memory (i.e., user space) directly. In contrast to conventional hardware accelerators that need physical addresses to execute bus commands, coherent accelerators use effective addresses to issue bus commands to an attached storage device. As a result, an operating system does not need to perform actions that are typical (and computationally expensive) to a conventional hardware accelerator, such as translating effective addresses to physical addresses, which requires steps such as pinning memory pages to prevent page faults. A coherent accelerator translates effective addresses to real addresses while accelerating a function. Therefore, the operating system, via the coherent accelerator, allows page faults to occur, handling the page faults such that the accelerator may continue to access application memory. This approach greatly reduces the number of instructions required to set up a DMA path for data transfer. Further, coherent accelerators allow developers to customize applications to more efficiently use the FPGA.
To access the coherent accelerator, an application attaches application memory to a hardware context of the coherent accelerator. A hardware context may include a page table that maps application memory to pages of the page table. Further, a hardware context may include a segment table for processors that have a segmented architecture, which specify which virtual pages belong to a given segment. Some legacy applications do not directly support the coherent accelerator. Therefore, the coherent accelerator device driver may provide shared (or multiplexed) contexts that are shared by a number of different processes. More generally, for all types of applications and processes, due to the limited number of available contexts often results in contexts being shared by processes.
On conventional systems, page faults generate synchronous exceptions which arrive in the context of a process as a result of a memory access instruction (e.g., loads, stores, etc.). Therefore, the interrupts generated on such systems responsive to page faults are synchronous interrupts. However, coherent accelerators may generate asynchronous interrupts, as a processor may receive an interrupt from a process that is not currently executing on that processor.